NVIDIA’s Vera CPU and Rubin GPU Anchor Computex 2026, Unlocking $20B CPU TAM and CoWoS Upside

Core Conclusion

Computex 2026 cements NVIDIA’s transition from GPU vendor to AI-factory architect. The Vera CPU crystallizes a new $20bn addressable market, forcing a re-rating of TSMC’s CoWoS roadmap to 200kwpm by 2027. At the same time, Rubin’s system-level thermal solution keeps the 2.3kW TDP target intact, and the Rubin Ultra packaging decision to stay with two dies per package removes a near-term yield risk. The direct investment implication is a higher structural demand floor for advanced packaging and test: we raise AllRing’s price target to NT$1,580 and remain overweight on NVIDIA’s full supply chain, including TSMC, UMC, KYEC, ASE, and Winway.

What Vera CPU Concretely Proves

Supply-chain checks confirm TSMC is dedicating incremental CoWoS-R capacity and 3nm wafer starts to Vera. Based on that allocation, 1.5m standalone CPU units is a base-case volume, with Microsoft, Meta, CoreWeave, and Oracle identified as early end-customers. This order of magnitude transforms Vera from an architectural curiosity into a $20bn revenue stream assumption—one that demands a distinct CoWoS capacity line. The investment translation is straightforward: CoWoS is no longer purely a GPU story; a CPU-driven second leg of demand is now being provisioned, raising the floor for TSMC and for CoWoS equipment and interposer suppliers.

System-Level Thermal and Packaging Clarity on Rubin

Rubin’s chip-level thermal solution rolled back to an earlier design that delivers 1.8kW TDP. The path to 2.3kW relies on server-system thermal collaboration—not on heroic silicon assumptions—which industrialises the risk. Meanwhile, Rubin Ultra requires fresh photomasks for HBM4e in 2027, and the decision to retain a two-die-per-package architecture preserves chip yield. The net effect is that both the near-term Rubin and the Ultra roadmap are derisked on execution, even as doubts had surfaced around warpage and multi-die complexity. A halted push toward four-die packages is a sign of discipline, not of an engineering setback.

CoWoS Capacity Resets, SoIC Build Slightly Tempered

We now model 2027 CoWoS capacity at 200kwpm, up from 170kwpm, driven by AP7 expansion and the conversion of Fab 15A 28nm/22nm space to 55nm interposer production. The interposer migration triggers an overflow order for UMC—Sony’s 28/22nm ISP demand will shift outward, keeping UMC an OW. On SoIC, production stays at 30/60kwpm for 2027/2028, but the build-out has slipped by three quarters, leading us to trim capacity build assumptions to 40/70kwpm from 45/78kwpm. The modest delay does not alter the medium-term thesis, but it tempers near-term equipment sensitivity.

Key Risks and Divergence Points

• Vera adoption trajectory: 1.5m units is a supply-led assumption; if hyperscaler qualification or software ecosystem integration lags, CoWoS utilisation could miss forecasts.
• System-thermal execution: 2.3kW TDP relies on rack-level liquid cooling and airflow co-design. Any delay in system-level validation defers the Rubin volume ramp.
• Rubin Ultra packaging endgame: Staying with two-die packages lowers technical risk but may leave performance upside on the table relative to a four-die approach, should competitors gain on chip-to-chip bandwidth.

Trade Implication

CoWoS duration is extended by Vera; Rubin’s thermal solution keeps the delivery schedule credible; packaging complexity is capped. The real-time signal is AllRing’s PT uplift to NT$1,580 (from NT$1,280), as the strongest pure-play proxy for CoWoS expansion into 2027. Beyond AllRing, the NVDA supply chain—TSMC, KYEC, ASE, Hon Precision, Winway—benefits from the twin drivers of GPU and CPU wafer volume. We would treat any near-term pullback linked to SoIC build-out headlines as an opportunity to add exposure.